In semiconductor manufacturing, complementary metal-oxide-semiconductor (CMOS) technology is commonly used for fabricating field effect transistors (FETs) as part of advanced integrated circuits, such as CPUs, memory, storage devices, and the like. In FETs, a channel region may be formed in an n-doped or p-doped semiconductor substrate on which a gate structure is created. The overall fabrication process may include forming a gate structure over a channel region. The channel region may connect a source region and a drain region within the substrate. The source and drain regions may be on opposite sides of the gate, typically with some vertical overlap between the gate and the source and drain regions.
A desired characteristic in CMOS manufacturing is the presence of a halo region. A halo region may be generally located interposed between the source and drain regions and the channel region, and may be of converse polarity to the source and drain regions. The presence of a halo region may reduce drain-source current leakage (punch-through effect) within the FET.
Halo regions may typically be formed through a low energy, low current ion implantation method carried out at large angle tilt after a gate and gate dielectric are in place. The gate and gate dielectric act as an ion implantation mask allowing implanted dopants to penetrate below the edge of the metal-oxide semiconductor gate stack. This particular method may hinder halo region implantation in faceted recess structures. Furthermore, the low energy, low current ion implantation method described above may compromise performance of FET devices already on the structure, since halo ion implantation may provide undesirable halo residual atoms physically at or near the FET gate dielectric. In addition, as the industry continues to move towards smaller scale devices, halo region implantation becomes even harder due to space reduction between gates (gate shadowing), which may also increase the undesirable effects described above. Additionally, when significant substrate removal occurs during the fabrication of faceted recess structures on a semiconductor substrate, integrity of the implanted halo region may be compromised given that the highest halo concentration is located where the faceted recess is produced.
Therefore, it would be desirable to provide a method and a structure having a field effect transistor on a substrate, and the substrate including a well-defined halo region wherein the halo region formation does not require ion implantation.